1. Field of the Invention
The present invention refers to a bootstrap circuit in DC/DC static converters, particularly in DC/DC static converters in step-down configuration. The present invention finds particular application in static converters wherein a bootstrap circuit is used to drive a MOSFET in high side configuration.
2. Description of Related Art
DC/DC static converters are widely used in power supplies, actuator systems, displays, signal processing systems etc. and are based on well-known circuit topologies wherein a magnetic means, such as a transformer or an inductance, is driven by at least one power switch. The switches are controlled by a Pulse Width Modulation (PWM) system commutating at a certain frequency set by a system timing signal.
In the field of static converters there are various circuit topologies, such as step-down converters, also known as xe2x80x9cbuckxe2x80x9d converters, in which the regulated output voltage is less than the input voltage, step-up converters, also known as xe2x80x9cboostxe2x80x9d converters, in which the regulated output voltage is greater than the input voltage and the converters called xe2x80x9cbuck-boostxe2x80x9d in which the regulated output voltage has an inverse sign compared to the input voltage.
In the configuration of the step-down converter illustrated in FIG. 1, the power switch is represented by an N-channel DMOS transistor Q1 in high-side configuration, that is a configuration in which the source terminal is not connected to a fixed potential circuit point. The source voltage of the DMOS Q1 can vary between a voltage Vin, which is the input voltage of the converter, when the DMOS Q1 is on and forces current in an inductance L1 (which is connected with the output terminal of the converter and to ground through a capacitor C1) and a voltagexe2x88x92Vd, which is the voltage drop on the freewheeling diode DR1 when the DMOS Q is off and the current stored in the inductance L1 flows through the diode DR1. A graph is shown in FIG. 3 which shows the waveform of the voltage at the source terminal of the DMOS Q1 when a load connected to the output of a circuit in FIG. 1 is at the maximum values.
It is well known to a technician in the sector that in order an N-channel DMOS transistor to be well on (that is its channel resistance Rdson is minimized), the voltage difference between the gate terminal and the source terminal of the DMOS is higher than about 10V. When the DMOS is well on, that is when it operates deeply in the resistive region, the voltage of the source terminal is about equal to the input voltage, apart from the voltage drop due to the resistance of the DMOS itself. This implies the needs of having a floating gate drive block 300, with which in the circuit in FIG. 1 the gate terminal and the source terminal of the transistor Q1 are connected, that is a circuit able to permit that the voltage at the gate terminal follows the voltage at the source terminal. Also it is necessary to have a voltage available which exceeds the input voltage by about 10 V. A widely diffused technique to form a floating gate drive circuit and in the same time to obtain the extra voltage is the so-called bootstrap technique; the bootstrap technique applied to a DMOS high-side of a DC/DC static converter in buck configuration is shown in FIG. 2.
The limit of this circuit solution is that the DMOS cannot be kept on for an indefinitely long tine and above all that a minimum time has to be guaranteed during which, while the magnetic means, that is the inductor, demagnetises, the potential of the source terminal is sufficiently near to zero so that a bootstrap capacitor CB is recharged.
The need of quickly recharging the capacitor is a pressing problem from the technological point of view when the DC/DC converter operates with low loads (that is loads changing from {fraction (1/20)} to {fraction (1/100)} of the nominal load) because one or more of the following issues can occur.
a) When the converter has a low load both the on time of the DMOS and the conduction time of the freewheeling diode are very short and the voltage at the source terminal of the transistor has the waveform as shown in FIG. 4. This means that if the load is sufficiently low the conduction time of the diode can become so short that it does not enable the capacitor to be fully recharged.
b) The DMOS cannot be on for less than a minimum time because of the delays of the control circuit. When the load is very low and requires the DMOS to be on for a time shorter than the allowed minimum time, since this is not possible, in the short time an excess of energy is brought onto the load with a resulting slight increase of the output voltage. The feedback control loop reacts and several switching cycles may be skipped so as to bring the output voltage back to the regulated value and re-establish the correct energy balance. In this case, therefore, the time available for recharging the bootstrap capacitor disappears.
c) If the input and output voltages are relatively high (both exceeding around ten Volts) and near to one other, the voltage forced in the inductor during the time in which the DMOS is on can be so low that the demagnetization of the inductor does not use all the energy stored in the parasitic capacitance of the source terminal. When this occurs, the voltage at the source terminal remains several Volts above zero, as shown in FIG. 5, the freewheeling diode is not switched on, and the bootstrap capacitor is little recharged or not recharged at all.
The result of the previously described phenomena is that the bootstrap capacitor is progressively discharged and as soon as its voltage goes below the threshold voltage of the DMOS transistor, the transistor cannot be turn on again and the converter will be blocked. According to the values of the input and output voltages and to the values of the components used in the converter, an intermittent functioning or a definitive block of the converter will be obtained.
This can be seen also during converter power-off at very low load: if the output voltage is relatively high (that is it overcomes ten Volts) the input voltage will diminish very slowly and when it approaches the output voltage it falls into condition (c). The result is that the output voltage does not go to zero monotonically but oscillating. The U.S. Pat. No. 5,627,460 discloses how to use the technique of the so-called xe2x80x9csynchronized diodexe2x80x9d applied to a DC/DC converter step-down in which the freewheeling diode is replaced by an N-channel DMOS in low-side configuration that is driven in push-pull with respect to the main DMOS. Such a solution is not applicable to the standard buck topology because the latter has the freewheeling diode and not two MOSFET""s synchronized in push-pull.
The International Rectifier in one of its application notes (DT94-1A xe2x80x9cKeeping the bootstrap capacitor charged in buck convertsxe2x80x9d) concerning its device IR2125, suggests applying a resistor and a Zener diode. This technique is effective when the input voltage is quite higher than the output voltage and therefore it is not applicable in the case (c). In addition, if the input voltage has a wide-range variation, to be able to guarantee sufficient current at the minimum input voltage a relatively low resistive value is necessary which leads, when the input voltage is high, to high power dissipation in the resistance and in the Zener.
Other known solutions resort to magnetic means but have the disadvantage that when the load of the converter has a low value the magnetic energy is also very low, comparable to or lower than that dissipated by the effect of the not-ideal coupling between the windings, with consequent loss of effectiveness.
In view of the state of the art, the object of the present invention is to provide a circuit suitable for avoiding the discharge of the bootstrap capacitor so as to permit more effective driving of the DMOS in high-side configuration.
In accordance with a preferred embodiment of the present invention, there is provided a bootstrap circuit in DC/DC static converters comprising a power transistor having a first non drivable terminal coupled with a first input voltage and driving means connected with a drivable terminal of the power transistor and adapted for determining the on time and the off time of the power transistor for each prefixed switching time period, the bootstrap circuit comprising a capacitor coupled respectively with a second non drivable terminal of the power transistor and with a second input voltage and an input of the driving means so that the voltage between its terminals is substantially equal to the voltage between the second non drivable terminal and the drivable terminal during the off time of the power transistor, an overcharge circuit arranged between the second non drivable terminal and a reference voltage, the overcharge circuit being able to allow overcharging the capacitor during the off time of the power transistor and for a time period lower than the off time.
Thanks to the present invention it is possible to form a circuit capable of eliminating the problems connected to the bootstrap technique.
In addition it is possible to form a circuit that permits the turning on of a DMOS high-side for an undetermined time.
The present invention finds application also in other circuit topologies of static converters such as the xe2x80x9cbuck-boostxe2x80x9d, the xe2x80x9cflybackxe2x80x9d, the two-switch xe2x80x9cforwardxe2x80x9d, the half-bridge and the full-bridge. The last two are used also for motor control.